diff --git a/MIC-Week1/.vs/MIC-Week1/v14/.atsuo b/MIC-Week1/.vs/MIC-Week1/v14/.atsuo index e86099e..ab3c1ac 100644 Binary files a/MIC-Week1/.vs/MIC-Week1/v14/.atsuo and b/MIC-Week1/.vs/MIC-Week1/v14/.atsuo differ diff --git a/MIC-Week1/Debug/MIC-Week1.lss b/MIC-Week1/Debug/MIC-Week1.lss index 53b8cd8..35b1ca2 100644 --- a/MIC-Week1/Debug/MIC-Week1.lss +++ b/MIC-Week1/Debug/MIC-Week1.lss @@ -3,31 +3,31 @@ MIC-Week1.elf: file format elf32-avr Sections: Idx Name Size VMA LMA File off Algn - 0 .data 00000002 00800100 00000226 000002ba 2**0 + 0 .data 00000002 00800100 00000214 000002a8 2**0 CONTENTS, ALLOC, LOAD, DATA - 1 .text 00000226 00000000 00000000 00000094 2**1 + 1 .text 00000214 00000000 00000000 00000094 2**1 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .bss 00000006 00800102 00800102 000002bc 2**0 + 2 .bss 00000006 00800102 00800102 000002aa 2**0 ALLOC - 3 .comment 00000030 00000000 00000000 000002bc 2**0 + 3 .comment 00000030 00000000 00000000 000002aa 2**0 CONTENTS, READONLY - 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000002ec 2**2 + 4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 000002dc 2**2 CONTENTS, READONLY - 5 .debug_aranges 00000068 00000000 00000000 00000328 2**0 + 5 .debug_aranges 00000070 00000000 00000000 00000318 2**0 CONTENTS, READONLY, DEBUGGING - 6 .debug_info 000003fa 00000000 00000000 00000390 2**0 + 6 .debug_info 00000410 00000000 00000000 00000388 2**0 CONTENTS, READONLY, DEBUGGING - 7 .debug_abbrev 000001cb 00000000 00000000 0000078a 2**0 + 7 .debug_abbrev 000001e3 00000000 00000000 00000798 2**0 CONTENTS, READONLY, DEBUGGING - 8 .debug_line 00000333 00000000 00000000 00000955 2**0 + 8 .debug_line 000003b0 00000000 00000000 0000097b 2**0 CONTENTS, READONLY, DEBUGGING - 9 .debug_frame 000000dc 00000000 00000000 00000c88 2**2 + 9 .debug_frame 000000ec 00000000 00000000 00000d2c 2**2 CONTENTS, READONLY, DEBUGGING - 10 .debug_str 00000207 00000000 00000000 00000d64 2**0 + 10 .debug_str 00000216 00000000 00000000 00000e18 2**0 CONTENTS, READONLY, DEBUGGING - 11 .debug_loc 00000163 00000000 00000000 00000f6b 2**0 + 11 .debug_loc 00000163 00000000 00000000 0000102e 2**0 CONTENTS, READONLY, DEBUGGING - 12 .debug_ranges 00000058 00000000 00000000 000010ce 2**0 + 12 .debug_ranges 00000060 00000000 00000000 00001191 2**0 CONTENTS, READONLY, DEBUGGING Disassembly of section .text: @@ -65,7 +65,7 @@ Disassembly of section .text: 3a: 00 00 nop 3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt> 3e: 00 00 nop - 40: 68 c0 rjmp .+208 ; 0x112 <__vector_16> + 40: 43 c0 rjmp .+134 ; 0xc8 <__vector_16> 42: 00 00 nop 44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt> 46: 00 00 nop @@ -116,7 +116,7 @@ Disassembly of section .text: 98: 11 e0 ldi r17, 0x01 ; 1 9a: a0 e0 ldi r26, 0x00 ; 0 9c: b1 e0 ldi r27, 0x01 ; 1 - 9e: e6 e2 ldi r30, 0x26 ; 38 + 9e: e4 e1 ldi r30, 0x14 ; 20 a0: f2 e0 ldi r31, 0x02 ; 2 a2: 00 e0 ldi r16, 0x00 ; 0 a4: 0b bf out 0x3b, r16 ; 59 @@ -140,195 +140,229 @@ Disassembly of section .text: bc: a8 30 cpi r26, 0x08 ; 8 be: b2 07 cpc r27, r18 c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop> - c2: a2 d0 rcall .+324 ; 0x208
- c4: ae c0 rjmp .+348 ; 0x222 <_exit> + c2: 99 d0 rcall .+306 ; 0x1f6
+ c4: a5 c0 rjmp .+330 ; 0x210 <_exit> 000000c6 <__bad_interrupt>: c6: 9c cf rjmp .-200 ; 0x0 <__vectors> -000000c8 : - wait(pattern[count].delay * speed); - - count++; - if(count >= NELEMS(pattern)) - { - count = 0; - c8: 18 16 cp r1, r24 - ca: 19 06 cpc r1, r25 - cc: 0c f5 brge .+66 ; 0x110 - ce: 20 91 06 01 lds r18, 0x0106 - d2: 30 91 07 01 lds r19, 0x0107 - d6: 21 30 cpi r18, 0x01 ; 1 - d8: 31 05 cpc r19, r1 - da: 51 f0 breq .+20 ; 0xf0 - dc: 20 e0 ldi r18, 0x00 ; 0 - de: 30 e0 ldi r19, 0x00 ; 0 - e0: 0c c0 rjmp .+24 ; 0xfa - e2: 40 91 06 01 lds r20, 0x0106 - e6: 50 91 07 01 lds r21, 0x0107 - ea: 41 30 cpi r20, 0x01 ; 1 - ec: 51 05 cpc r21, r1 - ee: 29 f4 brne .+10 ; 0xfa - f0: 10 92 07 01 sts 0x0107, r1 - f4: 10 92 06 01 sts 0x0106, r1 - f8: 08 95 ret - fa: ef ec ldi r30, 0xCF ; 207 - fc: f7 e0 ldi r31, 0x07 ; 7 - fe: 31 97 sbiw r30, 0x01 ; 1 - 100: f1 f7 brne .-4 ; 0xfe - 102: 00 c0 rjmp .+0 ; 0x104 - 104: 00 00 nop - 106: 2f 5f subi r18, 0xFF ; 255 - 108: 3f 4f sbci r19, 0xFF ; 255 - 10a: 28 17 cp r18, r24 - 10c: 39 07 cpc r19, r25 - 10e: 49 f7 brne .-46 ; 0xe2 - 110: 08 95 ret - -00000112 <__vector_16>: - 112: 1f 92 push r1 - 114: 0f 92 push r0 - 116: 0f b6 in r0, 0x3f ; 63 - 118: 0f 92 push r0 - 11a: 11 24 eor r1, r1 - 11c: 2f 93 push r18 - 11e: 8f 93 push r24 - 120: 9f 93 push r25 - 122: 98 9b sbis 0x13, 0 ; 19 - 124: 1a c0 rjmp .+52 ; 0x15a <__vector_16+0x48> - 126: 80 91 04 01 lds r24, 0x0104 - 12a: 90 91 05 01 lds r25, 0x0105 - 12e: 89 2b or r24, r25 - 130: a1 f4 brne .+40 ; 0x15a <__vector_16+0x48> - 132: 80 91 00 01 lds r24, 0x0100 - 136: 90 91 01 01 lds r25, 0x0101 - 13a: 88 0f add r24, r24 - 13c: 99 1f adc r25, r25 - 13e: 90 93 01 01 sts 0x0101, r25 - 142: 80 93 00 01 sts 0x0100, r24 - 146: 81 e0 ldi r24, 0x01 ; 1 - 148: 90 e0 ldi r25, 0x00 ; 0 - 14a: 90 93 07 01 sts 0x0107, r25 - 14e: 80 93 06 01 sts 0x0106, r24 - 152: 90 93 05 01 sts 0x0105, r25 - 156: 80 93 04 01 sts 0x0104, r24 - 15a: 99 9b sbis 0x13, 1 ; 19 - 15c: 1d c0 rjmp .+58 ; 0x198 <__vector_16+0x86> - 15e: 80 91 02 01 lds r24, 0x0102 - 162: 90 91 03 01 lds r25, 0x0103 - 166: 89 2b or r24, r25 - 168: b9 f4 brne .+46 ; 0x198 <__vector_16+0x86> - 16a: 80 91 00 01 lds r24, 0x0100 - 16e: 90 91 01 01 lds r25, 0x0101 - 172: 99 23 and r25, r25 - 174: 0c f4 brge .+2 ; 0x178 <__vector_16+0x66> - 176: 01 96 adiw r24, 0x01 ; 1 - 178: 95 95 asr r25 - 17a: 87 95 ror r24 - 17c: 90 93 01 01 sts 0x0101, r25 - 180: 80 93 00 01 sts 0x0100, r24 - 184: 81 e0 ldi r24, 0x01 ; 1 - 186: 90 e0 ldi r25, 0x00 ; 0 - 188: 90 93 07 01 sts 0x0107, r25 - 18c: 80 93 06 01 sts 0x0106, r24 - 190: 90 93 03 01 sts 0x0103, r25 - 194: 80 93 02 01 sts 0x0102, r24 - 198: 83 b3 in r24, 0x13 ; 19 - 19a: 81 11 cpse r24, r1 - 19c: 08 c0 rjmp .+16 ; 0x1ae <__vector_16+0x9c> - 19e: 10 92 05 01 sts 0x0105, r1 - 1a2: 10 92 04 01 sts 0x0104, r1 - 1a6: 10 92 03 01 sts 0x0103, r1 - 1aa: 10 92 02 01 sts 0x0102, r1 - 1ae: 80 91 00 01 lds r24, 0x0100 - 1b2: 90 91 01 01 lds r25, 0x0101 - 1b6: 84 31 cpi r24, 0x14 ; 20 - 1b8: 91 05 cpc r25, r1 - 1ba: 3c f4 brge .+14 ; 0x1ca <__vector_16+0xb8> - 1bc: 84 e1 ldi r24, 0x14 ; 20 - 1be: 90 e0 ldi r25, 0x00 ; 0 - 1c0: 90 93 01 01 sts 0x0101, r25 - 1c4: 80 93 00 01 sts 0x0100, r24 - 1c8: 09 c0 rjmp .+18 ; 0x1dc <__vector_16+0xca> - 1ca: 81 3a cpi r24, 0xA1 ; 161 - 1cc: 9f 40 sbci r25, 0x0F ; 15 - 1ce: 34 f0 brlt .+12 ; 0x1dc <__vector_16+0xca> - 1d0: 80 ea ldi r24, 0xA0 ; 160 - 1d2: 9f e0 ldi r25, 0x0F ; 15 - 1d4: 90 93 01 01 sts 0x0101, r25 - 1d8: 80 93 00 01 sts 0x0100, r24 - 1dc: 9f 91 pop r25 - 1de: 8f 91 pop r24 - 1e0: 2f 91 pop r18 - 1e2: 0f 90 pop r0 - 1e4: 0f be out 0x3f, r0 ; 63 - 1e6: 0f 90 pop r0 - 1e8: 1f 90 pop r1 - 1ea: 18 95 reti - -000001ec : - } -} - +000000c8 <__vector_16>: void opgave6(void) { PORTD = 0b10000000; - 1ec: 80 e8 ldi r24, 0x80 ; 128 - 1ee: 82 bb out 0x12, r24 ; 18 wait( blink ); - 1f0: 80 91 00 01 lds r24, 0x0100 - 1f4: 90 91 01 01 lds r25, 0x0101 - 1f8: 67 df rcall .-306 ; 0xc8 PORTD = 0b00000000; - 1fa: 12 ba out 0x12, r1 ; 18 wait( blink ); - 1fc: 80 91 00 01 lds r24, 0x0100 - 200: 90 91 01 01 lds r25, 0x0101 - 204: 61 cf rjmp .-318 ; 0xc8 - 206: 08 95 ret + c8: 1f 92 push r1 + ca: 0f 92 push r0 + cc: 0f b6 in r0, 0x3f ; 63 + ce: 0f 92 push r0 + d0: 11 24 eor r1, r1 + d2: 2f 93 push r18 + d4: 8f 93 push r24 + d6: 9f 93 push r25 + d8: 98 9b sbis 0x13, 0 ; 19 + da: 1a c0 rjmp .+52 ; 0x110 <__vector_16+0x48> + dc: 80 91 04 01 lds r24, 0x0104 + e0: 90 91 05 01 lds r25, 0x0105 + e4: 89 2b or r24, r25 + e6: a1 f4 brne .+40 ; 0x110 <__vector_16+0x48> + e8: 80 91 00 01 lds r24, 0x0100 + ec: 90 91 01 01 lds r25, 0x0101 + f0: 88 0f add r24, r24 + f2: 99 1f adc r25, r25 + f4: 90 93 01 01 sts 0x0101, r25 + f8: 80 93 00 01 sts 0x0100, r24 + fc: 81 e0 ldi r24, 0x01 ; 1 + fe: 90 e0 ldi r25, 0x00 ; 0 + 100: 90 93 07 01 sts 0x0107, r25 + 104: 80 93 06 01 sts 0x0106, r24 + 108: 90 93 05 01 sts 0x0105, r25 + 10c: 80 93 04 01 sts 0x0104, r24 + 110: 99 9b sbis 0x13, 1 ; 19 + 112: 1d c0 rjmp .+58 ; 0x14e <__vector_16+0x86> + 114: 80 91 02 01 lds r24, 0x0102 + 118: 90 91 03 01 lds r25, 0x0103 + 11c: 89 2b or r24, r25 + 11e: b9 f4 brne .+46 ; 0x14e <__vector_16+0x86> + 120: 80 91 00 01 lds r24, 0x0100 + 124: 90 91 01 01 lds r25, 0x0101 + 128: 99 23 and r25, r25 + 12a: 0c f4 brge .+2 ; 0x12e <__vector_16+0x66> + 12c: 01 96 adiw r24, 0x01 ; 1 + 12e: 95 95 asr r25 + 130: 87 95 ror r24 + 132: 90 93 01 01 sts 0x0101, r25 + 136: 80 93 00 01 sts 0x0100, r24 + 13a: 81 e0 ldi r24, 0x01 ; 1 + 13c: 90 e0 ldi r25, 0x00 ; 0 + 13e: 90 93 07 01 sts 0x0107, r25 + 142: 80 93 06 01 sts 0x0106, r24 + 146: 90 93 03 01 sts 0x0103, r25 + 14a: 80 93 02 01 sts 0x0102, r24 + 14e: 83 b3 in r24, 0x13 ; 19 + 150: 81 11 cpse r24, r1 + 152: 08 c0 rjmp .+16 ; 0x164 <__vector_16+0x9c> + 154: 10 92 05 01 sts 0x0105, r1 + 158: 10 92 04 01 sts 0x0104, r1 + 15c: 10 92 03 01 sts 0x0103, r1 + 160: 10 92 02 01 sts 0x0102, r1 + 164: 80 91 00 01 lds r24, 0x0100 + 168: 90 91 01 01 lds r25, 0x0101 + 16c: 84 31 cpi r24, 0x14 ; 20 + 16e: 91 05 cpc r25, r1 + 170: 3c f4 brge .+14 ; 0x180 <__vector_16+0xb8> + 172: 84 e1 ldi r24, 0x14 ; 20 + 174: 90 e0 ldi r25, 0x00 ; 0 + 176: 90 93 01 01 sts 0x0101, r25 + 17a: 80 93 00 01 sts 0x0100, r24 + 17e: 09 c0 rjmp .+18 ; 0x192 <__vector_16+0xca> + 180: 81 3a cpi r24, 0xA1 ; 161 + 182: 9f 40 sbci r25, 0x0F ; 15 + 184: 34 f0 brlt .+12 ; 0x192 <__vector_16+0xca> + 186: 80 ea ldi r24, 0xA0 ; 160 + 188: 9f e0 ldi r25, 0x0F ; 15 + 18a: 90 93 01 01 sts 0x0101, r25 + 18e: 80 93 00 01 sts 0x0100, r24 + 192: 9f 91 pop r25 + 194: 8f 91 pop r24 + 196: 2f 91 pop r18 + 198: 0f 90 pop r0 + 19a: 0f be out 0x3f, r0 ; 63 + 19c: 0f 90 pop r0 + 19e: 1f 90 pop r1 + 1a0: 18 95 reti -00000208
: +000001a2 : +} + +void charlieplexing(void) +{ + //Button C0 + if( (0b00000001 & PINC) != 0) + 1a2: 98 9b sbis 0x13, 0 ; 19 + 1a4: 05 c0 rjmp .+10 ; 0x1b0 + { + DDRD = 0b00000011; //PIN 1 & 2 as output. Pin 3 as input (TRI-STATE) + 1a6: 83 e0 ldi r24, 0x03 ; 3 + 1a8: 81 bb out 0x11, r24 ; 17 + PORTD = 0b00000001; //PIN 1 High, PIN 2 Low + 1aa: 81 e0 ldi r24, 0x01 ; 1 + 1ac: 82 bb out 0x12, r24 ; 18 + 1ae: 08 95 ret + } + + //Button C1 + else if( (0b00000010 & PINC) != 0) + 1b0: 99 9b sbis 0x13, 1 ; 19 + 1b2: 05 c0 rjmp .+10 ; 0x1be + { + DDRD = 0b00000011; //PIN 1 & 2 as output. Pin 3 as input (TRI-STATE) + 1b4: 83 e0 ldi r24, 0x03 ; 3 + 1b6: 81 bb out 0x11, r24 ; 17 + PORTD = 0b00000010; //PIN 2 High, PIN 1 Low + 1b8: 82 e0 ldi r24, 0x02 ; 2 + 1ba: 82 bb out 0x12, r24 ; 18 + 1bc: 08 95 ret + } + + //Button C2 + else if( (0b00000100 & PINC) != 0) + 1be: 9a 9b sbis 0x13, 2 ; 19 + 1c0: 05 c0 rjmp .+10 ; 0x1cc + { + DDRD = 0b00000110; //PIN 2 & 3 as output. Pin 1 as input (TRI-STATE) + 1c2: 86 e0 ldi r24, 0x06 ; 6 + 1c4: 81 bb out 0x11, r24 ; 17 + PORTD = 0b00000010; //PIN 2 High, PIN 3 Low + 1c6: 82 e0 ldi r24, 0x02 ; 2 + 1c8: 82 bb out 0x12, r24 ; 18 + 1ca: 08 95 ret + } + + //Button C3 + else if( (0b00001000 & PINC) != 0) + 1cc: 9b 9b sbis 0x13, 3 ; 19 + 1ce: 05 c0 rjmp .+10 ; 0x1da + { + DDRD = 0b00000110; //PIN 2 & 3 as output. Pin 1 as input (TRI-STATE) + 1d0: 86 e0 ldi r24, 0x06 ; 6 + 1d2: 81 bb out 0x11, r24 ; 17 + PORTD = 0b00000100; //PIN 3 High, PIN 2 Low + 1d4: 84 e0 ldi r24, 0x04 ; 4 + 1d6: 82 bb out 0x12, r24 ; 18 + 1d8: 08 95 ret + } + + //Button C4 + else if( (0b00010000 & PINC) != 0) + 1da: 9c 9b sbis 0x13, 4 ; 19 + 1dc: 05 c0 rjmp .+10 ; 0x1e8 + { + DDRD = 0b00000101; //PIN 3 & 1 as output. Pin 2 as input (TRI-STATE) + 1de: 85 e0 ldi r24, 0x05 ; 5 + 1e0: 81 bb out 0x11, r24 ; 17 + PORTD = 0b00000100; //PIN 3 High, PIN 1 Low + 1e2: 84 e0 ldi r24, 0x04 ; 4 + 1e4: 82 bb out 0x12, r24 ; 18 + 1e6: 08 95 ret + } + + //Button C5 + else if( (0b00100000 & PINC) != 0) + 1e8: 9d 9b sbis 0x13, 5 ; 19 + 1ea: 04 c0 rjmp .+8 ; 0x1f4 + { + DDRD = 0b00000101; //PIN 3 & 1 as output. Pin 2 as input (TRI-STATE) + 1ec: 85 e0 ldi r24, 0x05 ; 5 + 1ee: 81 bb out 0x11, r24 ; 17 + PORTD = 0b00000001; //PIN 1 High, PIN 3 Low + 1f0: 81 e0 ldi r24, 0x01 ; 1 + 1f2: 82 bb out 0x12, r24 ; 18 + 1f4: 08 95 ret + +000001f6
: } } int main(void) { DDRC = 0b00000000; //input - 208: 14 ba out 0x14, r1 ; 20 + 1f6: 14 ba out 0x14, r1 ; 20 DDRD = 0b11111111; //output - 20a: 8f ef ldi r24, 0xFF ; 255 - 20c: 81 bb out 0x11, r24 ; 17 + 1f8: 8f ef ldi r24, 0xFF ; 255 + 1fa: 81 bb out 0x11, r24 ; 17 - // Prescaler = FCPU/8000000 + // Prescaler TCCR0 |= (1 << CS01) | (1 << CS00); - 20e: 83 b7 in r24, 0x33 ; 51 - 210: 83 60 ori r24, 0x03 ; 3 - 212: 83 bf out 0x33, r24 ; 51 + 1fc: 83 b7 in r24, 0x33 ; 51 + 1fe: 83 60 ori r24, 0x03 ; 3 + 200: 83 bf out 0x33, r24 ; 51 //Enable Overflow Interrupt Enable TIMSK|=(1< + //opgave6(); + + charlieplexing(); + 20c: ca df rcall .-108 ; 0x1a2 //extraopgave(); } - 220: fe cf rjmp .-4 ; 0x21e + 20e: fe cf rjmp .-4 ; 0x20c -00000222 <_exit>: - 222: f8 94 cli +00000210 <_exit>: + 210: f8 94 cli -00000224 <__stop_program>: - 224: ff cf rjmp .-2 ; 0x224 <__stop_program> +00000212 <__stop_program>: + 212: ff cf rjmp .-2 ; 0x212 <__stop_program> diff --git a/MIC-Week1/Debug/MIC-Week1.map b/MIC-Week1/Debug/MIC-Week1.map index 17411ff..e2aa74a 100644 --- a/MIC-Week1/Debug/MIC-Week1.map +++ b/MIC-Week1/Debug/MIC-Week1.map @@ -14,6 +14,7 @@ Discarded input sections .text 0x00000000 0x0 main.o .data 0x00000000 0x0 main.o .bss 0x00000000 0x0 main.o + .text.wait 0x00000000 0x4a main.o .text.speaker 0x00000000 0x1e main.o .text.extraopgave 0x00000000 0x10 main.o @@ -21,6 +22,7 @@ Discarded input sections .text.opgave3 0x00000000 0x1c main.o .text.opgave4 0x00000000 0x1a main.o .text.opgave5 0x00000000 0x8a main.o + .text.opgave6 0x00000000 0x20 main.o .data.speed 0x00000000 0x2 main.o .bss.count 0x00000000 0x2 main.o .data.pattern 0x00000000 0x4b main.o @@ -190,7 +192,7 @@ END GROUP .rela.plt *(.rela.plt) -.text 0x00000000 0x226 +.text 0x00000000 0x214 *(.vectors) .vectors 0x00000000 0x8c C:/Program Files (x86)/Atmel/Studio/7.0/Packs/Atmel/ATmega_DFP/1.0.91/gcc/dev/atmega128/avr51/crtatmega128.o 0x00000000 __vector_default @@ -283,20 +285,19 @@ END GROUP 0x000000c6 __vector_20 0x000000c8 . = ALIGN (0x2) *(.text.*) - .text.wait 0x000000c8 0x4a main.o - 0x000000c8 wait .text.__vector_16 - 0x00000112 0xda main.o - 0x00000112 __vector_16 - .text.opgave6 0x000001ec 0x1c main.o - 0x000001ec opgave6 - .text.main 0x00000208 0x1a main.o - 0x00000208 main - 0x00000222 . = ALIGN (0x2) + 0x000000c8 0xda main.o + 0x000000c8 __vector_16 + .text.charlieplexing + 0x000001a2 0x54 main.o + 0x000001a2 charlieplexing + .text.main 0x000001f6 0x1a main.o + 0x000001f6 main + 0x00000210 . = ALIGN (0x2) *(.fini9) - .fini9 0x00000222 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avr51\libgcc.a(_exit.o) - 0x00000222 _exit - 0x00000222 exit + .fini9 0x00000210 0x0 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avr51\libgcc.a(_exit.o) + 0x00000210 _exit + 0x00000210 exit *(.fini9) *(.fini8) *(.fini8) @@ -315,11 +316,11 @@ END GROUP *(.fini1) *(.fini1) *(.fini0) - .fini0 0x00000222 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avr51\libgcc.a(_exit.o) + .fini0 0x00000210 0x4 c:/program files (x86)/atmel/studio/7.0/toolchain/avr8/avr8-gnu-toolchain/bin/../lib/gcc/avr/4.9.2/avr51\libgcc.a(_exit.o) *(.fini0) - 0x00000226 _etext = . + 0x00000214 _etext = . -.data 0x00800100 0x2 load address 0x00000226 +.data 0x00800100 0x2 load address 0x00000214 0x00800100 PROVIDE (__data_start, .) *(.data) *(.data*) @@ -344,8 +345,8 @@ END GROUP 0x00800106 reset *(COMMON) 0x00800108 PROVIDE (__bss_end, .) - 0x00000226 __data_load_start = LOADADDR (.data) - 0x00000228 __data_load_end = (__data_load_start + SIZEOF (.data)) + 0x00000214 __data_load_start = LOADADDR (.data) + 0x00000216 __data_load_end = (__data_load_start + SIZEOF (.data)) .noinit 0x00800108 0x0 0x00800108 PROVIDE (__noinit_start, .) @@ -416,34 +417,34 @@ END GROUP .debug_sfnames *(.debug_sfnames) -.debug_aranges 0x00000000 0x68 +.debug_aranges 0x00000000 0x70 *(.debug_aranges) .debug_aranges - 0x00000000 0x68 main.o + 0x00000000 0x70 main.o .debug_pubnames *(.debug_pubnames) -.debug_info 0x00000000 0x3fa +.debug_info 0x00000000 0x410 *(.debug_info .gnu.linkonce.wi.*) - .debug_info 0x00000000 0x3fa main.o + .debug_info 0x00000000 0x410 main.o -.debug_abbrev 0x00000000 0x1cb +.debug_abbrev 0x00000000 0x1e3 *(.debug_abbrev) - .debug_abbrev 0x00000000 0x1cb main.o + .debug_abbrev 0x00000000 0x1e3 main.o -.debug_line 0x00000000 0x333 +.debug_line 0x00000000 0x3b0 *(.debug_line .debug_line.* .debug_line_end) - .debug_line 0x00000000 0x333 main.o + .debug_line 0x00000000 0x3b0 main.o -.debug_frame 0x00000000 0xdc +.debug_frame 0x00000000 0xec *(.debug_frame) - .debug_frame 0x00000000 0xdc main.o + .debug_frame 0x00000000 0xec main.o -.debug_str 0x00000000 0x207 +.debug_str 0x00000000 0x216 *(.debug_str) - .debug_str 0x00000000 0x207 main.o - 0x23b (size before relaxing) + .debug_str 0x00000000 0x216 main.o + 0x24a (size before relaxing) .debug_loc 0x00000000 0x163 *(.debug_loc) @@ -467,9 +468,9 @@ END GROUP .debug_pubtypes *(.debug_pubtypes) -.debug_ranges 0x00000000 0x58 +.debug_ranges 0x00000000 0x60 *(.debug_ranges) - .debug_ranges 0x00000000 0x58 main.o + .debug_ranges 0x00000000 0x60 main.o .debug_macro *(.debug_macro) diff --git a/MIC-Week1/Debug/MIC-Week1.srec b/MIC-Week1/Debug/MIC-Week1.srec index fb7d4dc..3bbbd9d 100644 --- a/MIC-Week1/Debug/MIC-Week1.srec +++ b/MIC-Week1/Debug/MIC-Week1.srec @@ -3,36 +3,35 @@ S113000045C0000060C000005EC000005CC000008D S11300105AC0000058C0000056C0000054C0000080 S113002052C0000050C000004EC000004CC0000090 S11300304AC0000048C0000046C0000044C00000A0 -S113004068C0000040C000003EC000003CC000008A +S113004043C0000040C000003EC000003CC00000AF S11300503AC0000038C0000036C0000034C00000C0 S113006032C0000030C000002EC000002CC00000D0 S11300702AC0000028C0000026C0000024C00000E0 S113008022C0000020C000001EC0000011241FBEBA -S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E6E2FA +S1130090CFEFD0E1DEBFCDBF11E0A0E0B1E0E4E1FD S11300A0F2E000E00BBF02C007900D92A230B1074E S11300B0D9F721E0A2E0B1E001C01D92A830B20757 -S11300C0E1F7A2D0AEC09CCF181619060CF520910A -S11300D00601309107012130310551F020E030E074 -S11300E00CC040910601509107014130510529F49B -S11300F010920701109206010895EFECF7E0319792 -S1130100F1F700C000002F5F3F4F2817390749F768 -S113011008951F920F920FB60F9211242F938F936D -S11301209F93989B1AC08091040190910501892B9B -S1130130A1F48091000190910101880F991F90937F -S113014001018093000181E090E090930701809386 -S113015006019093050180930401999B1DC0809131 -S1130160020190910301892BB9F4809100019091CF -S1130170010199230CF401969595879590930101BB -S11301808093000181E090E0909307018093060141 -S1130190909303018093020183B3811108C01092EC -S11301A00501109204011092030110920201809142 -S11301B0000190910101843191053CF484E190E0C7 -S11301C0909301018093000109C0813A9F4034F06B -S11301D080EA9FE090930101809300019F918F91A9 -S11301E02F910F900FBE0F901F90189580E882BB3F -S11301F0809100019091010167DF12BA80910001A2 -S11302009091010161CF089514BA8FEF81BB83B738 -S1130210836083BF87B7816087BF12BE7894E6DFAF -S1090220FECFF894FFCFAD -S1050226E803E7 +S11300C0E1F799D0A5C09CCF1F920F920FB60F9263 +S11300D011242F938F939F93989B1AC080910401AE +S11300E090910501892BA1F4809100019091010167 +S11300F0880F991F909301018093000181E090E0A3 +S11301009093070180930601909305018093040165 +S1130110999B1DC08091020190910301892BB9F430 +S1130120809100019091010199230CF40196959519 +S11301308795909301018093000181E090E0909372 +S1130140070180930601909303018093020183B316 +S1130150811108C01092050110920401109203014C +S11301601092020180910001909101018431910566 +S11301703CF484E190E0909301018093000109C074 +S1130180813A9F4034F080EA9FE09093010180938C +S113019000019F918F912F910F900FBE0F901F9090 +S11301A01895989B05C083E081BB81E082BB0895CC +S11301B0999B05C083E081BB82E082BB08959A9B32 +S11301C005C086E081BB82E082BB08959B9B05C08D +S11301D086E081BB84E082BB08959C9B05C085E0DA +S11301E081BB84E082BB08959D9B04C085E081BBF4 +S11301F081E082BB089514BA8FEF81BB83B783601B +S113020083BF87B7816087BF12BE7894CADFFECFF1 +S1070210F894FFCF8C +S1050214E803F9 S9030000FC diff --git a/MIC-Week1/main.c b/MIC-Week1/main.c index 034cb38..779bd86 100644 --- a/MIC-Week1/main.c +++ b/MIC-Week1/main.c @@ -97,7 +97,7 @@ int main(void) DDRC = 0b00000000; //input DDRD = 0b11111111; //output - // Prescaler = FCPU/8000000 + // Prescaler TCCR0 |= (1 << CS01) | (1 << CS00); //Enable Overflow Interrupt Enable TIMSK|=(1<