371 lines
12 KiB
Plaintext
371 lines
12 KiB
Plaintext
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MIC-Week1.elf: file format elf32-avr
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .data 00000002 00800100 00000252 000002e6 2**0
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CONTENTS, ALLOC, LOAD, DATA
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1 .text 00000252 00000000 00000000 00000094 2**1
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .bss 00000008 00800102 00800102 000002e8 2**0
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ALLOC
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3 .comment 00000030 00000000 00000000 000002e8 2**0
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CONTENTS, READONLY
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4 .note.gnu.avr.deviceinfo 0000003c 00000000 00000000 00000318 2**2
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CONTENTS, READONLY
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5 .debug_aranges 00000070 00000000 00000000 00000354 2**0
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CONTENTS, READONLY, DEBUGGING
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6 .debug_info 00000422 00000000 00000000 000003c4 2**0
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CONTENTS, READONLY, DEBUGGING
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7 .debug_abbrev 000001e3 00000000 00000000 000007e6 2**0
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CONTENTS, READONLY, DEBUGGING
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8 .debug_line 000003ce 00000000 00000000 000009c9 2**0
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CONTENTS, READONLY, DEBUGGING
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9 .debug_frame 000000ec 00000000 00000000 00000d98 2**2
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CONTENTS, READONLY, DEBUGGING
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10 .debug_str 00000220 00000000 00000000 00000e84 2**0
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CONTENTS, READONLY, DEBUGGING
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11 .debug_loc 00000163 00000000 00000000 000010a4 2**0
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CONTENTS, READONLY, DEBUGGING
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12 .debug_ranges 00000060 00000000 00000000 00001207 2**0
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CONTENTS, READONLY, DEBUGGING
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Disassembly of section .text:
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00000000 <__vectors>:
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0: 45 c0 rjmp .+138 ; 0x8c <__ctors_end>
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2: 00 00 nop
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4: 60 c0 rjmp .+192 ; 0xc6 <__bad_interrupt>
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6: 00 00 nop
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8: 5e c0 rjmp .+188 ; 0xc6 <__bad_interrupt>
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a: 00 00 nop
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c: 5c c0 rjmp .+184 ; 0xc6 <__bad_interrupt>
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e: 00 00 nop
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10: 5a c0 rjmp .+180 ; 0xc6 <__bad_interrupt>
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12: 00 00 nop
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14: 58 c0 rjmp .+176 ; 0xc6 <__bad_interrupt>
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16: 00 00 nop
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18: 56 c0 rjmp .+172 ; 0xc6 <__bad_interrupt>
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1a: 00 00 nop
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1c: 54 c0 rjmp .+168 ; 0xc6 <__bad_interrupt>
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1e: 00 00 nop
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20: 52 c0 rjmp .+164 ; 0xc6 <__bad_interrupt>
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22: 00 00 nop
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24: 50 c0 rjmp .+160 ; 0xc6 <__bad_interrupt>
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26: 00 00 nop
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28: 4e c0 rjmp .+156 ; 0xc6 <__bad_interrupt>
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2a: 00 00 nop
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2c: 4c c0 rjmp .+152 ; 0xc6 <__bad_interrupt>
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2e: 00 00 nop
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30: 4a c0 rjmp .+148 ; 0xc6 <__bad_interrupt>
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32: 00 00 nop
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34: 48 c0 rjmp .+144 ; 0xc6 <__bad_interrupt>
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36: 00 00 nop
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38: 46 c0 rjmp .+140 ; 0xc6 <__bad_interrupt>
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3a: 00 00 nop
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3c: 44 c0 rjmp .+136 ; 0xc6 <__bad_interrupt>
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3e: 00 00 nop
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40: 68 c0 rjmp .+208 ; 0x112 <__vector_16>
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42: 00 00 nop
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44: 40 c0 rjmp .+128 ; 0xc6 <__bad_interrupt>
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46: 00 00 nop
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48: 3e c0 rjmp .+124 ; 0xc6 <__bad_interrupt>
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4a: 00 00 nop
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4c: 3c c0 rjmp .+120 ; 0xc6 <__bad_interrupt>
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4e: 00 00 nop
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50: 3a c0 rjmp .+116 ; 0xc6 <__bad_interrupt>
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52: 00 00 nop
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54: 38 c0 rjmp .+112 ; 0xc6 <__bad_interrupt>
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56: 00 00 nop
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58: 36 c0 rjmp .+108 ; 0xc6 <__bad_interrupt>
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5a: 00 00 nop
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5c: 34 c0 rjmp .+104 ; 0xc6 <__bad_interrupt>
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5e: 00 00 nop
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60: 32 c0 rjmp .+100 ; 0xc6 <__bad_interrupt>
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62: 00 00 nop
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64: 30 c0 rjmp .+96 ; 0xc6 <__bad_interrupt>
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66: 00 00 nop
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68: 2e c0 rjmp .+92 ; 0xc6 <__bad_interrupt>
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6a: 00 00 nop
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6c: 2c c0 rjmp .+88 ; 0xc6 <__bad_interrupt>
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6e: 00 00 nop
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70: 2a c0 rjmp .+84 ; 0xc6 <__bad_interrupt>
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72: 00 00 nop
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74: 28 c0 rjmp .+80 ; 0xc6 <__bad_interrupt>
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76: 00 00 nop
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78: 26 c0 rjmp .+76 ; 0xc6 <__bad_interrupt>
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7a: 00 00 nop
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7c: 24 c0 rjmp .+72 ; 0xc6 <__bad_interrupt>
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7e: 00 00 nop
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80: 22 c0 rjmp .+68 ; 0xc6 <__bad_interrupt>
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82: 00 00 nop
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84: 20 c0 rjmp .+64 ; 0xc6 <__bad_interrupt>
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86: 00 00 nop
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88: 1e c0 rjmp .+60 ; 0xc6 <__bad_interrupt>
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...
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0000008c <__ctors_end>:
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8c: 11 24 eor r1, r1
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8e: 1f be out 0x3f, r1 ; 63
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90: cf ef ldi r28, 0xFF ; 255
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92: d0 e1 ldi r29, 0x10 ; 16
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94: de bf out 0x3e, r29 ; 62
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96: cd bf out 0x3d, r28 ; 61
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00000098 <__do_copy_data>:
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98: 11 e0 ldi r17, 0x01 ; 1
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9a: a0 e0 ldi r26, 0x00 ; 0
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9c: b1 e0 ldi r27, 0x01 ; 1
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9e: e2 e5 ldi r30, 0x52 ; 82
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a0: f2 e0 ldi r31, 0x02 ; 2
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a2: 00 e0 ldi r16, 0x00 ; 0
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a4: 0b bf out 0x3b, r16 ; 59
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a6: 02 c0 rjmp .+4 ; 0xac <__do_copy_data+0x14>
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a8: 07 90 elpm r0, Z+
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aa: 0d 92 st X+, r0
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ac: a2 30 cpi r26, 0x02 ; 2
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ae: b1 07 cpc r27, r17
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b0: d9 f7 brne .-10 ; 0xa8 <__do_copy_data+0x10>
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000000b2 <__do_clear_bss>:
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b2: 21 e0 ldi r18, 0x01 ; 1
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b4: a2 e0 ldi r26, 0x02 ; 2
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b6: b1 e0 ldi r27, 0x01 ; 1
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b8: 01 c0 rjmp .+2 ; 0xbc <.do_clear_bss_start>
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000000ba <.do_clear_bss_loop>:
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ba: 1d 92 st X+, r1
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000000bc <.do_clear_bss_start>:
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bc: aa 30 cpi r26, 0x0A ; 10
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be: b2 07 cpc r27, r18
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c0: e1 f7 brne .-8 ; 0xba <.do_clear_bss_loop>
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c2: b6 d0 rcall .+364 ; 0x230 <main>
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c4: c4 c0 rjmp .+392 ; 0x24e <_exit>
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000000c6 <__bad_interrupt>:
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c6: 9c cf rjmp .-200 ; 0x0 <__vectors>
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000000c8 <wait>:
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if( (0b00000001 & PINC) != 0 )
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{
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PORTD = 0b10000000;
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wait( 100 );
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PORTD = 0b00000000;
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wait( 100 );
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c8: 18 16 cp r1, r24
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ca: 19 06 cpc r1, r25
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cc: 0c f5 brge .+66 ; 0x110 <wait+0x48>
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ce: 20 91 08 01 lds r18, 0x0108
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d2: 30 91 09 01 lds r19, 0x0109
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d6: 21 30 cpi r18, 0x01 ; 1
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d8: 31 05 cpc r19, r1
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da: 51 f0 breq .+20 ; 0xf0 <wait+0x28>
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dc: 20 e0 ldi r18, 0x00 ; 0
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de: 30 e0 ldi r19, 0x00 ; 0
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e0: 0c c0 rjmp .+24 ; 0xfa <wait+0x32>
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e2: 40 91 08 01 lds r20, 0x0108
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e6: 50 91 09 01 lds r21, 0x0109
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ea: 41 30 cpi r20, 0x01 ; 1
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ec: 51 05 cpc r21, r1
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ee: 29 f4 brne .+10 ; 0xfa <wait+0x32>
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f0: 10 92 09 01 sts 0x0109, r1
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f4: 10 92 08 01 sts 0x0108, r1
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f8: 08 95 ret
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fa: ef ec ldi r30, 0xCF ; 207
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fc: f7 e0 ldi r31, 0x07 ; 7
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fe: 31 97 sbiw r30, 0x01 ; 1
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100: f1 f7 brne .-4 ; 0xfe <wait+0x36>
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102: 00 c0 rjmp .+0 ; 0x104 <wait+0x3c>
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104: 00 00 nop
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106: 2f 5f subi r18, 0xFF ; 255
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108: 3f 4f sbci r19, 0xFF ; 255
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10a: 28 17 cp r18, r24
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10c: 39 07 cpc r19, r25
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10e: 49 f7 brne .-46 ; 0xe2 <wait+0x1a>
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110: 08 95 ret
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00000112 <__vector_16>:
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112: 1f 92 push r1
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114: 0f 92 push r0
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116: 0f b6 in r0, 0x3f ; 63
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118: 0f 92 push r0
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11a: 11 24 eor r1, r1
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11c: 2f 93 push r18
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11e: 8f 93 push r24
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120: 9f 93 push r25
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122: 98 9b sbis 0x13, 0 ; 19
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124: 1a c0 rjmp .+52 ; 0x15a <__vector_16+0x48>
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126: 80 91 06 01 lds r24, 0x0106
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12a: 90 91 07 01 lds r25, 0x0107
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12e: 89 2b or r24, r25
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130: a1 f4 brne .+40 ; 0x15a <__vector_16+0x48>
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132: 80 91 00 01 lds r24, 0x0100
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136: 90 91 01 01 lds r25, 0x0101
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13a: 88 0f add r24, r24
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13c: 99 1f adc r25, r25
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13e: 90 93 01 01 sts 0x0101, r25
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142: 80 93 00 01 sts 0x0100, r24
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146: 81 e0 ldi r24, 0x01 ; 1
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148: 90 e0 ldi r25, 0x00 ; 0
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14a: 90 93 09 01 sts 0x0109, r25
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14e: 80 93 08 01 sts 0x0108, r24
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152: 90 93 07 01 sts 0x0107, r25
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156: 80 93 06 01 sts 0x0106, r24
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15a: 99 9b sbis 0x13, 1 ; 19
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15c: 1d c0 rjmp .+58 ; 0x198 <__vector_16+0x86>
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15e: 80 91 04 01 lds r24, 0x0104
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162: 90 91 05 01 lds r25, 0x0105
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166: 89 2b or r24, r25
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168: b9 f4 brne .+46 ; 0x198 <__vector_16+0x86>
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16a: 80 91 00 01 lds r24, 0x0100
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16e: 90 91 01 01 lds r25, 0x0101
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172: 99 23 and r25, r25
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174: 0c f4 brge .+2 ; 0x178 <__vector_16+0x66>
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176: 01 96 adiw r24, 0x01 ; 1
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178: 95 95 asr r25
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17a: 87 95 ror r24
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17c: 90 93 01 01 sts 0x0101, r25
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180: 80 93 00 01 sts 0x0100, r24
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184: 81 e0 ldi r24, 0x01 ; 1
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186: 90 e0 ldi r25, 0x00 ; 0
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188: 90 93 09 01 sts 0x0109, r25
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18c: 80 93 08 01 sts 0x0108, r24
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190: 90 93 05 01 sts 0x0105, r25
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194: 80 93 04 01 sts 0x0104, r24
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198: 83 b3 in r24, 0x13 ; 19
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19a: 81 11 cpse r24, r1
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19c: 08 c0 rjmp .+16 ; 0x1ae <__vector_16+0x9c>
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19e: 10 92 07 01 sts 0x0107, r1
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1a2: 10 92 06 01 sts 0x0106, r1
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1a6: 10 92 05 01 sts 0x0105, r1
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1aa: 10 92 04 01 sts 0x0104, r1
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1ae: 80 91 00 01 lds r24, 0x0100
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1b2: 90 91 01 01 lds r25, 0x0101
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1b6: 84 31 cpi r24, 0x14 ; 20
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1b8: 91 05 cpc r25, r1
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1ba: 3c f4 brge .+14 ; 0x1ca <__vector_16+0xb8>
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1bc: 84 e1 ldi r24, 0x14 ; 20
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1be: 90 e0 ldi r25, 0x00 ; 0
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1c0: 90 93 01 01 sts 0x0101, r25
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1c4: 80 93 00 01 sts 0x0100, r24
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1c8: 09 c0 rjmp .+18 ; 0x1dc <__vector_16+0xca>
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1ca: 81 3a cpi r24, 0xA1 ; 161
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1cc: 9f 40 sbci r25, 0x0F ; 15
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1ce: 34 f0 brlt .+12 ; 0x1dc <__vector_16+0xca>
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1d0: 80 ea ldi r24, 0xA0 ; 160
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1d2: 9f e0 ldi r25, 0x0F ; 15
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1d4: 90 93 01 01 sts 0x0101, r25
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1d8: 80 93 00 01 sts 0x0100, r24
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1dc: 9f 91 pop r25
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1de: 8f 91 pop r24
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1e0: 2f 91 pop r18
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1e2: 0f 90 pop r0
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1e4: 0f be out 0x3f, r0 ; 63
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1e6: 0f 90 pop r0
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1e8: 1f 90 pop r1
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1ea: 18 95 reti
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000001ec <opgave4>:
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}
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}
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void opgave4(void)
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{
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wait( 50 );
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1ec: 82 e3 ldi r24, 0x32 ; 50
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1ee: 90 e0 ldi r25, 0x00 ; 0
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1f0: 6b df rcall .-298 ; 0xc8 <wait>
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if (PORTD>= 0x80)
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1f2: 97 9b sbis 0x12, 7 ; 18
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1f4: 07 c0 rjmp .+14 ; 0x204 <opgave4+0x18>
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{
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direction = 1;
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1f6: 81 e0 ldi r24, 0x01 ; 1
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1f8: 90 e0 ldi r25, 0x00 ; 0
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1fa: 90 93 03 01 sts 0x0103, r25
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1fe: 80 93 02 01 sts 0x0102, r24
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202: 0e c0 rjmp .+28 ; 0x220 <opgave4+0x34>
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}
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else if (PORTD <= 0x1)
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204: 82 b3 in r24, 0x12 ; 18
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206: 82 30 cpi r24, 0x02 ; 2
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208: 28 f4 brcc .+10 ; 0x214 <opgave4+0x28>
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{
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direction = 0;
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20a: 10 92 03 01 sts 0x0103, r1
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20e: 10 92 02 01 sts 0x0102, r1
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212: 0a c0 rjmp .+20 ; 0x228 <opgave4+0x3c>
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}
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if(direction)
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214: 80 91 02 01 lds r24, 0x0102
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218: 90 91 03 01 lds r25, 0x0103
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21c: 89 2b or r24, r25
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21e: 21 f0 breq .+8 ; 0x228 <opgave4+0x3c>
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PORTD = (PORTD>>1);
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220: 82 b3 in r24, 0x12 ; 18
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222: 86 95 lsr r24
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224: 82 bb out 0x12, r24 ; 18
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226: 08 95 ret
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else
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PORTD = (PORTD<<1);
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228: 82 b3 in r24, 0x12 ; 18
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22a: 88 0f add r24, r24
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22c: 82 bb out 0x12, r24 ; 18
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22e: 08 95 ret
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00000230 <main>:
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}
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}
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int main(void)
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{
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DDRC = 0b00000000; //input
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230: 14 ba out 0x14, r1 ; 20
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DDRD = 0b11111111; //output
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232: 8f ef ldi r24, 0xFF ; 255
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234: 81 bb out 0x11, r24 ; 17
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// Prescaler
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TCCR0 |= (1 << CS01) | (1 << CS00);
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236: 83 b7 in r24, 0x33 ; 51
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238: 83 60 ori r24, 0x03 ; 3
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23a: 83 bf out 0x33, r24 ; 51
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//Enable Overflow Interrupt Enable
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TIMSK|=(1<<TOIE0);
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23c: 87 b7 in r24, 0x37 ; 55
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23e: 81 60 ori r24, 0x01 ; 1
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240: 87 bf out 0x37, r24 ; 55
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//Initialize Counter
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TCNT0=0;
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242: 12 be out 0x32, r1 ; 50
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sei();
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244: 78 94 sei
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//Alleen voor opgave 4
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PORTD = 0x1;
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246: 81 e0 ldi r24, 0x01 ; 1
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248: 82 bb out 0x12, r24 ; 18
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while (1)
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{
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//opgave1();
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//opgave2();
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//opgave3();
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opgave4();
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24a: d0 df rcall .-96 ; 0x1ec <opgave4>
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//opgave6();
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//charlieplexing();
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//extraopgave();
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}
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24c: fe cf rjmp .-4 ; 0x24a <main+0x1a>
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0000024e <_exit>:
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24e: f8 94 cli
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00000250 <__stop_program>:
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250: ff cf rjmp .-2 ; 0x250 <__stop_program>
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